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Intel digs deep to keep Moore's Law alive

Agam Shah | March 29, 2017
Intel is changing the way it measures process technology advancements in a bid to hang on to Moore's Law.

"There is an amount of reasonableness to it," Brookwood said, saying Intel remains ahead of rivals on chip density. Intel has an advantage on gate and metal pitches, giving its chips more density.

Intel will continue to deliver new PC and server chip architectures every year, with a minimum 15 percent performance improvement per generation. Coming next will be 8th Generation Core chips made on the 14-nm process, an unprecedented fourth chip architecture on the process technology. Intel will also be releasing PC chips code-named Cannon Lake based on the 10-nm process later this year.

That could create a scenario where Intel has 14-nm and 10-nm PC chips hitting the market at the same time. That could create issues in the branding of chips and confusion among buyers looking to acquire the latest and greatest Intel processors.

Intel last month said it will stress performance benefits to chip buyers, while playing down the role of process technology.

For the past few years, Intel has moved away from the once-famous "tick-tock" scaling, where new processes were "ticks" and new architectures were "tocks." It is switching to what the company calls "hyperscaling" advances, a new metaphor announced on Tuesday to describe manufacturing advances. Intel will now use the "+" and "++" symbols to mark advances in the 14-nm and 10-nm processes.

Hyperscaling will help Intel cram new architectural and process innovations without hurrying a move to a new manufacturing process.

New lithography techniques like quad-patterning will help Intel take advantage of the economic benefits described by Moore's Law, said Kaizad Mistry, vice president and co-director of logic technology development at Intel. That will improve transistor density, which also brings performance and power-efficiency enhancements.

Intel is projecting 15 percent improvements in performance with each advance in the 10-nm + and ++ processes. Intel will also reduce the chip size to pack I/O, logic and SRAM blocks into a much smaller area.

Intel is doing what the company calls "aggressive pitch scaling," which involves packing wires, transistors and 3D fins closer together. On the 10-nm process, that helps provide transistor density improvement that is 2.7 times better than the 14-nm process, an advance that Intel said is well above the Moore's Law average.

The chip maker is also bringing the ability to mix and match different cores into an integrated system-on-chip. The cores could be made using different manufacturing processes. It's also much how ARM chips are designed and made, a process that  integrates CPUs, modems, graphics processors and other cores into a single chip.


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