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Chip makers fight dwindling gains in efficiency

James Niccolai | Feb. 24, 2011
The latest generation of graphics chips have 3 billion transistors and consume about 200 watts of energy. The numbers are impressive -- until you consider that the human brain has the equivalent of a trillion transistors and consumes just 20 watts of energy, or far less than it takes to run a light bulb.

He and other panelists also have faith in a packaging technique dubbed 3D stacking, in which chips are layered on top of each other instead of side by side. It allows for shorter interconnects to bind them together, reducing electrical waste.

Many of these techniques are still at the research stage, however. And if they are not compatible with current CMOS manufacturing equipment they will be expensive to implement.

There's another way to come at the problem. Chips are fairly inflexible today, in the sense that they don't adapt much to their environment, said Philippe Magarshack, vice president for research and development at STMicroelectronics. He proposed an approach he called "sense and react."

The demands placed on a smartphone chip can vary widely. Chips should be able to ramp their voltage, clock speed and other properties up and down depending on whether a phone is making a call or showing a video, or whether it's close to a base station or far away, he said.

It's done to an extent today with clock gating and voltage scaling, but it could be done much more if each component -- the antenna, receiver and so on -- were designed in concert, Magarshack said.

"The holy grail is that the system only expends power and energy when needed. This is definitely not possible with the tools we have today. We need the next generation of tools and methods," he said.

He and Sun also proposed a so-called wide I/O architecture, which would allow multiple components to share an input/output device. A DRAM chip could be stacked on a baseband processor, for example, and do parallel instead of serial I/O operations, Magarshack said.

Dobberpuhl, the former DEC engineer, said the biggest gains can be made from improved algorithms and architectures, including more efficient parallel designs.

Herman Eul, president of Intel Mobile Communications, said the key is moving functions handled by analog processors into digital. Digital circuits are easier to shrink, he said, and they can be reprogrammed -- so a single transceiver could be used for all five frequency bands in a 3G phone, for example, instead of the five separate chips used today.

"The most power effective transistor is the transistor which is not there," Eul said.

In general the panelists seemed optimistic, if only because engineering persistence has broken through many barriers in the past.

"In general, engineers never give up," Eul said.


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